KEY FEATURES:
- Low inductance PCB mounts that can be easily de-embedded from the capacitor or component measurement
- P2102A pads on the back side of each mount to easily measure using 2-port shunt-thru impedance measurements
- SMA connectors to use any VNA for 2-port shunt-thru impedance measurements 
 
What's Included with each mount:
-QTYx2 SMA connectors
 
The design and performance of power distribution networks (PDNs) in modern printed circuit board assemblies (PCBAs) and application-specific integrated circuits (ASICs) are paramount for ensuring a stable and clean voltage to the load. To achieve this, accurate modeling of all elements of the PDN is essential. One often overlooked element is an accurate representation of the capacitors that filter voltage ripple at the load and provide a matched impedance from the source to the load. Capacitors are an integral part of any PDN, yet the models used can be compromised by additional inductance introduced during the measurement process. This added inductance creates an error term in the model, affecting the capacitor’s impedance’s accuracy and the PDN’s quality.
 
This error term comes from failing to properly de-embed the measurement mount when characterizing capacitors. Many vendor-provided capacitor models contain extra inductance from the measurement mount, which can result in inaccuracies in the representation of capacitor parameters such as the resonance frequency, equivalent series resistance (ESR), and equivalent series inductance (ESL). This error term can then lead to errors in the simulation of the PDN, concealing resonant Q-points or causing unnecessary over-design efforts to mitigate inductance that does not exist in the physical PDN.
 
There is no standard method for de-embedding the measurement mount for capacitor models provided by component vendors. Any capacitor model from a vendor may or may not be de-embedded from the PCB mount. Unfortunately, there is often no way to know if a capacitor model includes the PCB mounting inductance beyond making measurement-based models for that capacitor.
 
De-embedded capacitor models must be used for design analysis. Engineers must make their own using an accurate measurement setup if a vendor cannot provide them. It was shown by using measurements without de-embedding the test fixture (typical of many vendor capacitor models) that additional ESL significantly impacts a PDN design analysis in both the frequency domain and time domain. Additional ESL in a capacitor model can lead a designer to over-design the PDN to address these false impedance peaks. To achieve design sign-off for PDNs, simulations must include accurate capacitor models with the PCB mounting inductance removed. If accurate capacitor models are unavailable, designers should be prepared to make their own measurement-based models.
 
Source: Who Put that Inductor in My Capacitor, McCaffrey, W., Huddleston, T., Dannan, B., Kuszewski, J. Signal Integrity Journal. January 2024.
 
Additional Information:
SnP models for each PCB mount are not provided. These can easily be created for de-embedded by purchasing an additional mount that is shorted. This shorted mount can now easily be used to de-embed the PCB mount from measurement during calibration or in a simulation tool like Keysight ADS.
 
Mounts come with SMA connectors not assembled. Signal Edge Solutions is happy to support the component assembly of the SMA connectors. Just specify this at checkout.