Importance of Measuring Impedance of a PDN or VRM Before Design Integration (Part 2: Fixing the Instability)
- Emily Tann
- May 6
- 4 min read
Updated: May 7
In Part 1 of this blog series, we discussed why we measure impedance, how to measure impedance of a VRM, identifying instability using these measurements, and how to fix this instability. In part 2, we will review the changes made to the EVM, as well as the effects of these changes in both the frequency domain and the time domain.
As a quick refresher, we previously measured the impedance on Wurth Elektronik's 178013801 EVM with a 1Ω DC load and an output voltage of 0.85V. We found that this EVM has significant instability at 20kHz and performing NISM at this frequency results in a stability margin of 7.957°, far below the industry-accepted stability margin of 45°. This is not uncommon and hence why using example designs from vendors may not always be as simple as copying and pasting into your schematic.
To reduce this impedance spike and reach a Ztarget of 20mΩ at 20kHz, we calculated that we would need an additional 4.25mF of capacitance to this PDN. With the space limitations on this board, we were only able to add one 1.5mF capacitor, or 35% of the additional capacitance we calculated; however, even with this one capacitor addition, we see a significant change in the impedance measurement. Performing NISM at this new impedance peak results in a stability margin of 32°, a large improvement from the original 7.957°.
So, how is this change reflected in the time domain? To see the effects, we can look at both the voltage ripple, as well as at the transient response of the output voltage before and after the addition of the 1500uF capacitor.
The ripple measurements were taken using a Picotest P2104A 1-Port Transmission Line PDN Probe across an output capacitor, with a 1 Ohm DC load added to the output. The results can be seen in Figure 3 and Figure 4.
Before adding the 1500uF capacitor, we measured 11.84 mVpp of ripple on the output and after adding the capacitor, this ripple was reduced to 6.92 mVpp, or a 41% improvement. Depending on the constraints of your design, this may be very significant.
A major observation to note is the oscillation captured on the baseline (original design) measurement. Looking at the spectrum plot, the frequency of this oscillation is 21 kHz. This is exactly the frequency of the instability we identified earlier in our impedance measurements! Thus, we can conclude that this oscillation is due to the initial instability we identified in the PDN. After improving this instability, as expected, the oscillation is not as prominent; only a slight oscillation is observed in the time domain waveform shown in Figure 4.
Next, we can observe the transient response of the output voltage using the Picotest P2105A Probe-Based Stepper (S10), with the setup shown in Figure 5.
In the following transient response waveforms, we used the 1 Ohm S10 probe head to apply a 0.85A step load on the output voltage both before and after the capacitor addition. The S10 is driven by an arbitrary waveform generator that outputs a 1 kHz pulsed waveform from 0V to 5V. (For additional information on using the S10, check out this blog post: Power Integrity Measurement Tips with the MXO5 & S10 | Capturing Large Signal Phenomena with a TPSM828303A PDN). The resulting waveforms using the S10 (to apply our step load) can be seen in Figures 6 and 7.
The transient response before adding the 1500uF capacitor shows a 54.39 mVpp voltage swing with oscillations. This voltage swing would be unacceptable in many designs and would likely violate voltage compliance specs in the system. However, applying the same step load after the capacitor change shows this voltage swing reduced to only 26.99 mVpp and is more likely to be within the bounds of your constraints, leading to a successful design. Although this is a large improvement, there is still some oscillation in this transient response because, as you may recall, this capacitor addition resulted in a new stability margin of 32°, below the industry-accepted standard of 45°.
As we have shown, with one simple capacitor addition, we were able to improve our stability margin by 24°, reduce the voltage ripple by 41%, and reduce the transient response of the output voltage by nearly 50%. Remember, this all began with one simple impedance measurement because we wanted to verify the performance of the vendor design.
Closing thoughts: To ensure your design is optimized for stability and performance, always include impedance measurements as a standard part of your design workflow. By addressing impedance-related issues early, you’ll save time and resources in the long run, ensuring that your designs are both robust and reliable in real-world applications.
References:
GN&C Engineering Best Practices For Human-Rated Spacecraft Systems
Evaluation Boards MagI³C-VDLM | Power Modules (MagI³C Series) | Würth Elektronik Product Catalog
Omicron Bode 500 Vector Network Analyzer | Signal Edge Solutions
Picotest J2113A Semi-Floating Differential Amplifier | Ground Loop Breaker | Signal Edge Solutions
Picotest P2102A 2-Port Probe | VRM, Power Plane, & Decoupling Measurements | Signal Edge Solutions
Picotest P2104A 1-Port Transmission Line PDN Probe | Signal Edge Solutions
Picotest P2105A Probe-Based Stepper (S10) | Signal Edge Solutions
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