Case Study: VRM Stability and PDN Optimization with SEPIA Part 1
- Kathleen Love
- 3 hours ago
- 4 min read
Part One: Preparing for Measurement
What if you could do full automated stability testing in 30 seconds? Perform a complete large scale analysis on any power supply? And learn how to fix any stability issue? That’s the power of SEPIA, developed by Steve Sandler of Picotest. In this two part blog, we will discuss how SEPIA transforms the stability measurement process and how you can leverage automation to make your stability testing more efficient.
How Do We Measure Stability?
First, we need to establish how to measure stability. Non-LTI systems, such as PMBus, are becoming more and more standard, which makes using traditional methods of assessing stability more challenging. If you’re a power integrity engineer, you are familiar with Bode plots, which are small signal measurements that function on the assumption that the system is linear and time-invariant (LTI). But what do you do when you don’t have access to the loop? What if you are getting an answer that is non-linear? All of these scenarios are solvable using non-invasive stability measurements (NISM) or scope embedded power integrity analysis (SEPIA), technologies invented by Steve Sandler of Picotest.
Closed loop = open loop / 1 + t. You can solve for t to calculate your loop gain, and ultimately determine your loop bandwidth. Stability margin can be extracted from your on and off impedance measurements, as your on impedance is your closed loop and your off impedance is your open loop.
Why Do We Need a Step Load?
Step loads are one of the most efficient and effective measurements to stress your system. They allow you to excite more frequencies in less than a nanosecond, which exposes more nonlinear transients and control loop phenomena than you would see with a small signal analysis.

Let’s take a look at an example from Steve Sandler’s 2016 DesignCon paper “Death of the Bode Plot.” On the left in Figure 1, we can see a Bode plot example that says we have 78 degrees of phase margin, showing that the design is stable. On the right we have a Nyquist plot, showing that the min distance is actually 0.138.
Looking at the step load response on the same device, we can see that there is a lot of ringing going on. From looking at the oscillation, we can determine the Q factor, which in this example is approximately Q = 3. Since we can prove mathematically that a Q of 2 is always going to be 30 degrees or more, we can conclude that our stability margin is less than 30 degrees. So on the one hand we have a Bode plot telling us that the design is stable, but a large signal step response is showing us that it is not.
Why We Work With Large Signal and Small Signal Analysis
Small signal: PSRR, Bode plot, and impedance measurements
Large signal: transient step response, voltage droop, peak power delivery phenomena
When we are working with power supplies and PDNs, we need to check everything. As we can see from the above example, small signal measurements alone aren’t enough to validate. Large signal analysis gives us important data that small signal testing alone will miss, such as duty cycle and slew rate. For a more in-depth dive into testing for large-signal phenomena, you can reference our previous blog Large Signal Phenomena using the MXO5 - Sequential Trigger Measurement Setup.
Masashi Nagawa at MPS is demonstrating how SEPIA is able to detect these nonlinear phenomena, and how loop corrections are kicking in on MPS based voltage regulators. His work reveals that the regulator is actually corrected for, and that SEPIA is showing how the stability is kicking in, which are good benchmarks for ultimately testing our system and exercising it in a real-world way.
Frequency in the Time Domain
Before going more into stability in the time domain of SEPIA, let’s dive in a bit more on stability in the frequency domain. Figure 2 shows an example where we measured three different VRMs from three different vendors on three different evaluation boards, and you can see that there's a commonality here based on these impedance plots. All three are unstable because of a high Q of greater than 2.

We're showing this using NISM, which was created by Steve Sandler and runs in most simulators like Qspice, and ADS. NISM works by taking the impedance and we're extracting the group delay. From the group delay we can do the derivative, and from that derivative, we can calculate the rate of change of phase and from there we can determine our Q and from Q our stability margin. Like SEPIA, it works for anything that has an open loop or closed loop response, including both LTI and non-LTI systems, which makes it a great tool when using impedance measurements. NISM is a well validated method, and it is a key part of how we were able to demonstrate how the math used for SEPIA is correct.
What is SEPIA?
SEPIA, which stands for scope embedded power integrity analysis, gives you a complete VRM stability assessment from a single step response. You can run SEPIA in ADS for free by pulling in and running the encrypted AEL, which we have available, in an example ADS workspace for download here.
In part two of this blog series, we will walk through how to measure and analyze the stability of a simple RLC circuit using SEPIA.
Further reading:
